As a result of shrinkage of critical dimensions (CD), the dimensions of semiconductor devices have moved beyond the resolution limit. In semiconductor fabrication processes, the resolution of a photoresist pattern begins to blur at a half pitch of about 45 nanometers (nm). Thus, multi-exposure methods have been developed so that manufacturers can continue to use fabrication equipment purchased for larger technology nodes.
Multi patterning lithography (MPL) is one lithography strategy that is used in emerging technology nodes to overcome the limitations of lithographic resolution. Multiple exposure or multi-patterning technology (MPT) involves forming patterns on a single layer using two or more different masks in succession. As long as the patterns within each individual mask comply with the relevant minimum separation distances for the technology node, the combination of patterns formed by using the plural masks may include smaller spaces than the minimum separation distance. MPT allows line segments, and in some cases, vertices (angles) to be formed of a vertical segment and a horizontal segment on the same mask. Thus, MPT provides flexibility and generally allows for significant reduction in overall IC layout.
During MPL data prep, an original layout is decomposed into two or more colors (e.g., black and gray), such that nodes of the same color are formed on the same mask of a multiple patterning lithography exposure (e.g., a double patterning, triple patterning, etc.). By splitting IC layout data into multiple masks, printing below a printable threshold is enabled since the data on each of the separate masks does not violate the printable threshold.